Some devices such as memories (e.g. non volatile memories) utilize discrete charge storage elements called nanoclusters (e.g. of silicon, aluminum, gold, or germanium) for storing charge in a charge storage location of a transistor. In some examples, the nanoclusters are located between two dielectric layers, a bottom dielectric and a control dielectric. Examples of such transistors include thin film storage transistors. A memory typically includes an array of such transistors. Examples of nanocluster types include doped and undoped semiconductor nanoclusters such as silicon nanoclusters, germanium nanoclusters and their alloys. Other examples of nanocluster types include various conductive structures such as metal nanoclusters (e.g., gold nanoclusters and aluminum nanoclusters), and metal alloy nanoclusters. In some examples, nanoclusters are from 10–100 Angstroms in size.
Some memories that have charge storage transistors with nanoclusters are implemented on integrated circuits that also include high voltage transistors in the circuitry used for charging and discharging the charge storage locations of the charge storage transistors. Charging or discharging the charge storage locations is used to store one or more bits of information, and may be referred to as programming or erasing. These high voltage transistors typically include a relatively thick gate oxide. When nanocluster-based memories are integrated with transistors having thick gate oxide layers for handling relatively higher voltages and with transistors having thinner gate oxide layers, the severe oxidizing ambient used to make such transistors causes an undesirable increase in the nanocluster-based memory bottom dielectric thickness and also causes nanocluster oxidation. Any protection layer that is used to protect nanocluster-based memories may result in damage to the memories when the protection layer is removed. Accordingly, an improved method for making a device with nanoclusters is desirable.
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